Analysis of Schedule and Layout Tuning for Sparse Matrices With Compound Entries on GPUs

dc.contributor.authorMueller‐Roemer, J. S.en_US
dc.contributor.authorStork, A.en_US
dc.contributor.authorFellner, D.en_US
dc.contributor.editorBenes, Bedrich and Hauser, Helwigen_US
dc.date.accessioned2020-10-06T16:53:59Z
dc.date.available2020-10-06T16:53:59Z
dc.date.issued2020
dc.description.abstractLarge sparse matrices with compound entries, i.e. complex and quaternionic matrices as well as matrices with dense blocks, are a core component of many algorithms in geometry processing, physically based animation and other areas of computer graphics. We generalize several matrix layouts and apply joint schedule and layout autotuning to improve the performance of the sparse matrix‐vector product on massively parallel graphics processing units. Compared to schedule tuning without layout tuning, we achieve speedups of up to 5.5 × . In comparison to cuSPARSE, we achieve speedups of up to 4.7 × .en_US
dc.description.number6
dc.description.sectionheadersArticles
dc.description.seriesinformationComputer Graphics Forum
dc.description.volume39
dc.identifier.doi10.1111/cgf.13957
dc.identifier.issn1467-8659
dc.identifier.pages133-143
dc.identifier.urihttps://doi.org/10.1111/cgf.13957
dc.identifier.urihttps://diglib.eg.org:443/handle/10.1111/cgf13957
dc.publisher© 2020 Eurographics ‐ The European Association for Computer Graphics and John Wiley & Sons Ltden_US
dc.subjectGPGPU
dc.subjectparallel computing
dc.subjectsparse matrix
dc.subjectSpMV
dc.titleAnalysis of Schedule and Layout Tuning for Sparse Matrices With Compound Entries on GPUsen_US
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