Through the Concurrency Gateway: a Challenge from the Near Future of Graphics Hardware
| dc.contributor.author | Welch, P. H. | en_US |
| dc.contributor.editor | Dirk Bartz and Bruno Raffin and Han-Wei Shen | en_US |
| dc.date.accessioned | 2014-01-26T16:25:00Z | |
| dc.date.available | 2014-01-26T16:25:00Z | |
| dc.date.issued | 2004 | en_US |
| dc.description.abstract | The computer graphics industry, and in particular those involved with films, games and virtual reality, continue to demand more and more realistic computer generated images. The complexity of the scenes being modelled and the high fidelity required of the images means that rendering is simply not possible in a reasonable time (let alone real-time) on a single computer[BrW03]. Interactive ray tracing exists today[WSB*01], but real-time global illumination remains a major challenge. Fortunately, "computer graphics cards are developing at Moore's law cubed" [David Kirk, Chief Scientist, nVIDIA]. Such performance increases are directly due to the inherent parallel nature of modern graphics cards. If this trend continues, they will be 100 times faster in a mere 3.5 years time, 1000 times faster in 5 years and they will be massively parallel. Unfortunately, past experiences in designing systems that can exploit parallel processors in anything beyond embarrassingly trivial ways are not encouraging. For real-time interaction with high fidelity images, the parallel processing requirements will not be embarrassingly trivial! Regular and irregular patterns of synchronisation and communication will have to be managed over networks of fine-grained (for accuracy) model components whose scale, topology and physical distribution are dynamically evolving. This paper reviews weaknesses in our standard approaches to the design and implementation of concurrent systems and describes ways forward that are mature and practical - both for the programmer to program and the hardware to execute. They are built on decades of research into process algebrae (CSP and the p-calculus), but are able to preserve and exploit traditional skills and capabilities of serial software engineering and von Neumann architecture (components of which will still form the processor base of parallel systems for at least the next decade). The changes are, therefore, evolutionary rather than revolutionary - but are nevertheless essential both in the field of graphics and for the wider Grand Challenges of computer science. | en_US |
| dc.description.seriesinformation | Eurographics Workshop on Parallel Graphics and Visualization | en_US |
| dc.identifier.isbn | 3-905673-11-8 | en_US |
| dc.identifier.issn | 1727-348X | en_US |
| dc.identifier.uri | https://doi.org/10.2312/EGPGV/EGPGV04/017-022 | en_US |
| dc.publisher | The Eurographics Association | en_US |
| dc.title | Through the Concurrency Gateway: a Challenge from the Near Future of Graphics Hardware | en_US |
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