A VLSI System Architecture for High-Speed Radiative Transfer 3D Image Synthesis

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dc.contributor.authorBu, Jichunen_US
dc.contributor.authorDeprettere, Ed F.en_US
dc.date.accessioned2015-10-05T07:55:24Z
dc.date.available2015-10-05T07:55:24Z
dc.date.issued1987en_US
dc.description.abstractIn this paper we present a VLSI system architecture for high-speed synthesis of 3D images composed of diffusely reflective surfaces. The system consists of two loosely coupled sub-systems. The first sub-system computes the form-factor matrix F. The form-factor computation is based on the hemi-cube approximation technique, where the patch-to-hemi-cube projections are computed by an efficient ray-tracing algorithm. The second sub-system, a multiprocessor Gauss-Seidel iterative system solver, solves the sparse system of radiosity equations (I-AF)b=e. The described system is suitable for VLSI implementation. Pipelined CORDIC processors are used in the first sub-system, and pipelined multiplier/accumulator processors are used in the second sub-system.en_US
dc.description.seriesinformationEG 1987-Technical Papersen_US
dc.identifier.doi10.2312/egtp.19871017en_US
dc.identifier.issn1017-4656en_US
dc.identifier.urihttps://doi.org/10.2312/egtp.19871017en_US
dc.publisherEurographics Associationen_US
dc.titleA VLSI System Architecture for High-Speed Radiative Transfer 3D Image Synthesisen_US
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EG1987 Proceedings (Technical Papers)