Parallel Longest Common Subsequence using Graphics Hardware
dc.contributor.author | Kloetzli, John | en_US |
dc.contributor.author | Strege, Brian | en_US |
dc.contributor.author | Decker, Jonathan | en_US |
dc.contributor.author | Olano, Marc | en_US |
dc.contributor.editor | Jean M. Favre and Kwan-Liu Ma | en_US |
dc.date.accessioned | 2014-01-26T16:43:25Z | |
dc.date.available | 2014-01-26T16:43:25Z | |
dc.date.issued | 2008 | en_US |
dc.description.abstract | We present an algorithm for solving the Longest Common Subsequence problem using graphics hardware accel- eration. We identify a parallel memory access pattern which enables us to run efficiently on multiple layers of parallel hardware by matching each layer to the best sub-algorithm, which is determined using a mix of theoretical and experimental data including knowledge of the specific hardware and memory structure of each layer. We implement a linear-space, cache-coherent algorithm on the CPU, using a two-level algorithm on the GPU to com- pute subproblems quickly. The combination of all three running on a CPU/GPU pair is a fast, flexible and scalable solution to the Longest Common Subsequence problem. Our design method is applicable to other algorithms in the Gaussian Elimination Paradigm, and can be generalized to more levels of parallel computation such as GPU clusters. | en_US |
dc.description.seriesinformation | Eurographics Symposium on Parallel Graphics and Visualization | en_US |
dc.identifier.isbn | 978-3-905674-04-0 | en_US |
dc.identifier.issn | 1727-348X | en_US |
dc.identifier.uri | https://doi.org/10.2312/EGPGV/EGPGV08/057-064 | en_US |
dc.publisher | The Eurographics Association | en_US |
dc.title | Parallel Longest Common Subsequence using Graphics Hardware | en_US |
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