Piggybacking for More Efficient Parallel Out-of-Core Isosurfacing

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dc.contributor.authorNewman, Timothy S.en_US
dc.contributor.authorMa, Wenjunen_US
dc.contributor.editorAlan Heirich and Bruno Raffin and Luis Paulo dos Santosen_US
dc.date.accessioned2014-01-26T16:30:49Z
dc.date.available2014-01-26T16:30:49Z
dc.date.issued2006en_US
dc.description.abstractA scheme for improving the efficiency of parallel isosurfacing for very large datasets is presented. The scheme is aimed at improving performance in multi-processor environments, especially for environments in which interprocessor communication limitations become a bottleneck, such as when the number of processors can scale up without commensurate scale up in inter-processor communication bandwidth. The scheme enables load-balanced computation while also limiting unnecessary communication between processors through the use of communication piggybacking and interleaving. Empirical results are also presented and suggest that the scheme reduces communication by about 15% and overall isosurfacing time by about 13% over a highly efficient non-piggybacked parallel isosurfacing approach.en_US
dc.description.seriesinformationEurographics Symposium on Parallel Graphics and Visualizationen_US
dc.identifier.isbn3-905673-40-1en_US
dc.identifier.issn1727-348Xen_US
dc.identifier.urihttps://doi.org/10.2312/EGPGV/EGPGV06/145-152en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectCategories and Subject Descriptors (according to ACM CCS): I.3.6 [Computer Graphics]: Graphics data structures and data typesen_US
dc.titlePiggybacking for More Efficient Parallel Out-of-Core Isosurfacingen_US
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EGPGV06: Eurographics Symposium on Parallel Graphics and Visualization