Improving BVH Ray Tracing Speed Using the AVX Instruction Set

dc.contributor.authorÁfra, Attila T.en_US
dc.contributor.editorR. Laramee and I. S. Limen_US
dc.date.accessioned2014-02-06T15:37:10Z
dc.date.available2014-02-06T15:37:10Z
dc.date.issued2011en_US
dc.description.abstractHigh performance ray tracing on the CPU requires the efficient utilization of SIMD instructions. Ray packet and ray stream traversal algorithms achieve this by performing computations on multiple rays, nodes, or primitives at the same time. In this paper, we present our approach to optimizing coherent BVH ray packet tracing for the new AVX instruction set, which enables 8-wide SIMD operations on 32-bit floating-point numbers. We have measured an average speedup of about 50 percent compared to our SSE4.1 implementation, on an Intel Sandy Bridge processor.en_US
dc.description.seriesinformationEurographics 2011 - Postersen_US
dc.identifier.issn1017-4656en_US
dc.identifier.urihttps://doi.org/10.2312/EG2011/posters/027-028en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectCategories and Subject Descriptors (according to ACM CCS): I.3.7 [Computer Graphics]: Three-Dimensional Graphics and Realism-Raytracingen_US
dc.titleImproving BVH Ray Tracing Speed Using the AVX Instruction Seten_US
Files
Original bundle
Now showing 1 - 2 of 2
Loading...
Thumbnail Image
Name:
027-028.pdf
Size:
579.56 KB
Format:
Adobe Portable Document Format
Loading...
Thumbnail Image
Name:
a4poster.pdf
Size:
794.5 KB
Format:
Adobe Portable Document Format
Collections